The majority of present day integrated circuits are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. A MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain regions between which a current can flow. A control voltage applied to the gate electrode controls the flow of current through a channel between the source and drain regions.
As a result of the shrinking sizes of integrated circuits, photolithographic masks project smaller and smaller structures onto a photosensitive layer, i.e., a photoresist, dispensed on a semiconductor wafer. In order to enable the decrease of the critical dimensions (CD) of the structural elements forming the integrated circuits (ICs), the exposure wavelength of photolithographic masks has been shifted from the near ultraviolet across the mean ultraviolet into the far ultraviolet region of the electromagnetic spectrum. Presently, a wavelength of 193 nm is typically used for the exposure of the photoresist on wafers. As a consequence, the manufacturing of photolithographic masks with increasing resolution is becoming more and more complex. In the future, photolithographic masks will use even smaller wavelengths in the extreme ultraviolet (EUV) wavelength range of the electromagnetic spectrum. The term EUV mask denotes a photolithographic mask for the EUV wavelength range (for example, from about 10 nm to about 15 nm).
The optical elements for the EUV wavelength range will include reflective optical elements. For the fabrication of an EUV optical element, a multilayer structure or a multilayer film is deposited on a substrate having an ultralow thermal expansion (ULE). Fused silica is an example of a substrate used for EUV optical elements. The multilayer system may include 80 to 120 alternating layers of molybdenum (Mo) and silicon (Si). A pair of a Mo—Si layers or a Mo—Si bilayer has a depth of approximately 7 nm. At the boundary of the Mo—Si layers, a portion of the incident EUV radiation is reflected, so that a Mo—Si multilayer layer system ideally reflects more than 70% of the incident EUV radiation.
In addition to the multilayer structure, an EUV mask includes a pattern or an absorbing pattern structure on top of the multilayer. For example, the EUV radiation absorbing pattern may be formed of titanium nitride, tantalum nitride, or chromium. The interaction of the EUV radiation absorbing portions and EUV radiation reflecting portions of the EUV mask generates, in case of an illumination with EUV radiation, the pattern to be presented in the photoresist dispensed on a semiconductor wafer, such pattern thereafter being used to fabricate one or more features of the integrated circuit.
High precision is required at the fabrication of EUV optical elements, in particular for EUV masks. Errors on the order of only 1 nm may cause errors in the image of the pattern structure on the wafer. Mask errors or defects that are apparent on the pattern of the wafer generated by the mask are called printing errors. Defects of different types can occur at various positions of the EUV mask leading to various effects. Mask defects may lead to undesirable amplitude and phase errors in the fabrication of integrated circuits therefrom.
Accordingly, it is desirable to provide improved methods to counteract the undesirable effects caused by errors in EUV masks. It further is desirable to provide methods for EUV mask defect mitigation, understanding that it is not possible to eliminate all defects in an EUV mask. Furthermore, other desirable features and characteristics of the present disclosure will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.